Skip to content
Main menu
  • Main page
  • Discover
  • Unexpected connections
  • Topics
  • Random article
  • Search
Your library
  • Saved articles
  • Recent discoveries
  • Rabbit-hole trails
Topic areas
  • Computer Science
  • Mathematics
  • Physics
  • Engineering
  • Biology
  • Economics
  • Curiosities
WikiholeDeeper into Wikipedia
EnglishEN
  • Saved
  • History

  • Article text and media come live from Wikipedia via the official MediaWiki API and are available under the Creative Commons Attribution-ShareAlike 4.0 License; additional terms may apply. Each article links to its source and revision.
  • WikiHole is an independent project and is not affiliated with the Wikimedia Foundation.
  • How ranking works
  • All topics
  • Reading history
  • Random article
  • MediaWiki API

Flash memory controller

  • Article
  • Rabbit hole
  • Read
  • View history
Tools
Actions
  • Read
  • View history
General
  • Recent changes
  • Related articles
  • Random discovery
This article
Reading time
3 min
Topic
Computer Science
Views
208 in 14 days
Last edited
14 Nov 2025
Print/export
  • Printable version
In other projects
  • Wikidata item
From Wikipedia, the free encyclopedia
Rabbit hole:
  1. Flash memory controller
Flash memory controller
Integrated circuit that interfaces flash memory to a host like a PC

A flash memory controller (or flash controller) manages data stored on flash memory (usually NAND flash) and communicates with a computer or electronic device. Flash memory controllers can be designed for operating in low duty-cycle environments like memory cards, or other similar media for use in PDAs, mobile phones, etc. USB flash drives use flash memory controllers designed to communicate with personal computers through the USB port at a low duty-cycle. Flash controllers can also be designed for higher duty-cycle environments like solid-state drives (SSDs) used as data storage for laptop computer systems up to enterprise .

mission-critical
storage arrays
1

Loading the rest of the article…

Recent changes

Rabbit hole

Where Flash memory controller leads. Every connection below has a source: a link in this article, a shared Wikipedia category, or CirrusSearch text similarity. Articles already on your trail are left out.

Contents
  • (Top)
  • Initial setup
  • Reading, writing, and erasing
  • Wear-leveling and block picking
  • Flash translation layer (FTL) and mapping
  • Garbage collection
  • References
  • Recent changes
  • Rabbit hole
Contents
Contents8 sections
  • (Top)
  • Initial setup
  • Reading, writing, and erasing
  • Wear-leveling and block picking
  • Flash translation layer (FTL) and mapping
  • Garbage collection
  • References
  • Recent changes
  • Rabbit hole
Study aids for Flash memory controller

Terminology

flash controller
A flash memory controller (or flash controller) manages data stored on flash memory (usually NAND flash) and communicates with a computer or electronic device.
garbage collection
This is a process called garbage collection (GC).

Terms the article defines in bold, quoted in context.

Categories:
  • Computer memory
  • Solid-state computer storage
  • Application-specific integrated circuits

892 words · 8 references · revision 1322050714 · CC BY-SA 4.0

General
  • Recent changes
  • Related articles
  • Random discovery
This article
Reading time
3 min
Topic
Computer Science
Views
208 in 14 days
Last edited
14 Nov 2025

Key concepts

  • USB flash drive2
  • Flash memory1
  • NAND flash1
  • Computer1
  • Electronic device1
  • Duty-cycle1
  • Memory card1
  • Data storage device1
  • Personal digital assistant1
  • Mobile phone1

The articles this one links to most, weighted towards the introduction.

Print/export
  • Printable version
In other projects
  • Wikidata item

Initial setup

After a flash storage device is initially manufactured, the flash controller is first used to format the flash memory. This ensures the device is operating properly, it maps out bad flash memory cells, and it allocates spare cells to be substituted for future failed cells. Some part of the spare cells is also used to hold the firmware which operates the controller and other special features for a particular storage device. A directory structure is created to allow the controller to convert requests for logical sectors into the physical locations on the actual flash memory chips.1

Reading, writing, and erasing

Main article: Flash memory § Principles of operation

When the system or device needs to read data from or write data to the flash memory, it will communicate with the flash memory controller. Simpler devices like SD cards and USB flash drives typically have a small number of flash memory die connected simultaneously. Operations are limited to the speed of the individual flash memory die. In contrast, a high-performance solid-state drive will have more dies organized with parallel communication paths to enable speeds many times greater than that of a single flash die.

Wear-leveling and block picking

Main article: Wear leveling

Flash memory can withstand a limited number of program-erase cycles. If a particular flash memory block were programmed and erased repeatedly without writing to any other blocks, the one block would wear out before all the other blocks thereby prematurely ending the life of the storage device. For this reason flash controllers use a technique called wear leveling to distribute writes as evenly as possible across all the flash blocks in the SSD. In a perfect scenario this would enable every block to reach its terabytes written threshold.2

Flash translation layer (FTL) and mapping

Main article: Flash file system

Usually, flash memory controllers also include the "flash translation layer" (FTL), a layer below the file system that maps host side or file system logical block addresses (LBAs) to the physical address of the flash memory (logical-to-physical mapping). The LBAs refer to sector numbers and to a mapping unit of 512 bytes. All LBAs that represent the logical size visible to and managed by the file system are mapped to a physical location (block ID, page ID and sector ID) of the flash memory. As part of the wear leveling and other flash management algorithms (bad block management, read disturb management, safe flash handling etc.), the physical location of an LBA might dynamically change frequently. The mapping units of an FTL can differ so that LBAs are mapped block-, page- or even sub-page-based. Depending on the usage pattern, a finer mapping granularity can significantly reduce the flash wear out and maximize the endurance of a flash based storage media.345 The deduplication function to eliminate redundant data and duplicate writes is also added in FTL.6

As the FTL metadata takes up its own flash space, it needs protection in case of power loss. In addition, it is possible for the mapping table to wear out before other parts of the flash memory has, prematurely ending the life of a storage device. This is usually avoided in enterprise devices by allocating an oversized space for spares, although more durable forms of storage like MRAM has been proposed for FTL too.

The FTL may have three types: page mapping, block mapping, and hybrid mapping. Page mapping can have higher performance, but it has bigger FTL metadata size and higher cost, and is usually used on solid state drives. Block mapping can have smaller metadata size and lower cost, but it has lower performance, and is usually used on . On page mapping FTL implementations, the ratio of FTL metadata size and storage capacity is usually 1:1000, for example, a 1TB flash storage device may have 1GB of FTL metadata.

Garbage collection

Main article: Garbage collection (SSD)

Once every block of a solid-state storage device has been written one time, the flash controller will need to return to some of the initial blocks which no longer have current data (also called stale blocks). The data in these blocks were replaced with newly written blocks and now they are waiting to be erased so that new data can be written into them. This is a process called garbage collection (GC). All SSDs, CF cards and other flash storage devices will include some level of garbage collection. The speed at which a flash controller will do this can vary.8

References

  1. 1"Flash Memory Guide" (PDF). kingston.com. Retrieved 7 March 2013.
  2. 2Chang, Li-Pin (2007-03-11). "On Efficient Wear Leveling for Large Scale Flash Memory Storage Systems". CiteSeerX 10.1.1.103.4903. {{cite CiteSeerX}}: Cite uses deprecated parameter |citeseerx= (help)
  3. 3Goodson, Garth; Iyer, Rahul. "Design Tradeoffs in a Flash Translation Layer" (PDF). Archived from the original (PDF) on June 23, 2015.
  4. 4"Understanding Flash: The Flash Translation Layer". September 17, 2014.
  5. 5Heidrich, Susan (February 2015). "New flash management architecture enables MLC for industrial storage" (PDF). Archived from the original (PDF) on 2015-06-23. Retrieved 2015-06-23.
  6. 6Chen, Feng; Luo, Tian; Zhang, Xiaodong (2011). . FAST' 11. p. 6.
USB flash drives

Usually the FTL is implemented by firmware running on a flash memory controller built into the storage device (such as nearly all SSDs, eMMCs, SD cards, USB flash drives, etc). However, some systems connect the host processor directly to raw flash chips with no intermediate hardware flash memory controller, and instead handle bad-block management and wear leveling with software running on the host processor.7

CAFTL: a content-aware flash translation layer enhancing the lifespan of flash memory based solid state drives
  • 7"UBIFS - UBI File-System: Raw flash vs. FTL devices".
  • 8"SSDs - Write Amplification, TRIM and GC" (PDF). OCZ Technology. Archived from the original (PDF) on 2012-05-26. Retrieved 2010-05-31.
  • Created
    10 Aug 2010
    History
    108 edits
    56 contributors
    No edits in the last 30 days
    Last edited
    14 Nov 2025

    108 revisions in total · 56 contributors

    1. 14 Nov 2025, 03:02 UTCDavidCary§ Flash translation layer (FTL) and mapping mention alternative to hardware flash memory controller.+544diff
    2. 22 Oct 2025, 18:52 UTCQuindecembermcopyediting for grammar and clarity−23diff
    3. 9 Oct 2025, 02:58 UTCNyqmlc common nouns, style improvement+5diff
    4. 3 Feb 2025, 17:38 UTCJschaumamgrammar nits+1diff
    5. 3 Feb 2025, 17:37 UTCJschaumamgrammar nit+1diff
    6. 3 Feb 2025, 17:36 UTCJschaumamgrammar nit+1diff
    7. 20 Jan 2025, 14:00 UTCGhostCarrotacronym grammar+1diff
    8. 21 Nov 2024, 06:05 UTCAnonymous contributor§ Flash translation layer (FTL) and mapping+393diff

    View full revision history

    Created
    10 Aug 2010
    History
    108 edits
    56 contributors
    No edits in the last 30 days
    Last edited
    14 Nov 2025

    Related articles are unavailable right now.

    Wikipedia is rate limiting us right now. Try again in a minute.